doi: 10.7763/IJMO.2012.V2.124
A Real Measurement Power Tool for Intellectual Property on FPGA
N. Chalbi
,
M. Boubaker
,
M. H. Bedoui
- Biophysics laboratory, TIM Project; Medical Faculty of Monastir, Monastir, TUNISIA.
Abstract
The FPGA (Field Programmable Gate Array) power consumption has become a very critical problem for new technologies. Also, in order to develop embedded systems it is necessary to controll this parameter at a high level of the conception design. For these reasons, we present in this paper an RTL (Register Transfer Level) IPs (Intellectual Property) power models. The characterization phase of the dynamic power variation was carried out by using a real power measurement tool organized around of the XC2VP4 (Virtex-II Pro) device. The RTL models were elaborated according to the clock frequency and input activity rate. The accuracy of the adopted methodology has been justified by comparing our results with the UAM (University Autonoma Madrid) and the Xilinx Xpower tools.
Keywords
- FPGA power consumption
- real power measurement tool
- characterization
- accuracy
How to Cite
N. Chalbi, M. Boubaker, and M. H. Bedoui, "A Real Measurement Power Tool for Intellectual Property on FPGA," International Journal of Modeling and Optimization, vol. 2, no. 3, pp. 263-268, 2012. https://doi.org/ 10.7763/IJMO.2012.V2.124
Copyright & License
Copyright © 2012 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).