doi: 10.7763/IJMO.2011.V1.76
A Low Voltage Wideband CMOS Mixer with High Linearity
Hung-Che Wei
- Department of Electronic Communication Engineering, National Kaohsiung Marine University, Kaohsiung 81143, Taiwan, R.O.C.
Abstract
A low voltage wideband CMOS down-conversion mixer is described. The gm-boosted and the current-bleeding techniques are employed to improve the linearity of the proposed mixer. The mixer implemented by tsmc 0.18 μm CMOS process achieves maximum input third-order intercept point (IIP3) of 2.6 dBm, power conversion gains of 6.9 dB, and single side-band noise figure (SSB NF) 20.8 dB. The mixer operates over the entire 1.4–3.6 GHz LTE-advanced bands and consumes 6.5 mA of current from a 1.2 V power supply.
Keywords
- 4G
- CMOS
- LTE-advanced
- linearity
- low voltage
- mixer
How to Cite
Hung-Che Wei, "A Low Voltage Wideband CMOS Mixer with High Linearity," International Journal of Modeling and Optimization, vol. 2, no. 1, pp. 7-10, 2012. https://doi.org/ 10.7763/IJMO.2011.V1.76
Copyright & License
Copyright © 2012 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).