Abstract—Compressors, as one of the Processing Elements (PEs), are the fundamental building blocks for accumulating partial products during the multiplication process. In this paper various high speed high-order compressors such as 6:2 and 7:2 compressors are compared with 6:3 and 7:3 ones in terms of designs and hardware requirements. To evaluate their performance, they are analyzed and compared with respect to delay and Power-Delay Product (PDP). The comparison is accomplished using the recent implementation of Full-Adder cell design at transistor-level in Carbon Nanotube Field Effect Transistor (CNFET) technology. Simulations are carried out using Synopsys HSPICE with 32nm CNTFET technology and 0.65 supply voltage. The results of simulations demonstrate the superiority of the n:3structures in terms ofpropagation delay and powerconsumption around %41 and%8, respectively.
Index Terms—CNFET, compressor, counter, full adder, multiplier. I.
Shima Mehrabi is with Department of Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran. (e-mail: sh.mehrabi@srbiau.ac.ir).
Keivan Navi is with Department of Electrical and Computer Engineering, University of California, Irvine, USA (e-mail: knavi@uci.edu).
Omid Hashemipour is with Faculty of Electrical and Computer Engineering, ShahidBeheshti University, G.C., Tehran, Iran (e-mail: hashemipour@sbu.ac.ir).
[PDF]
Cite:Shima Mehrabi, Keivan Navi, and Omid Hashemipour,"Performance Comparison of High-Speed High-Order (n:2) and (n:3) CNFET-Based Compressors," International Journal of Modeling and Optimization vol. 3, no. 5, pp. 432-435, 2013.
